The present invention relates to Hall effect magnetic sensors and particularly to ones provided in monolithic integrated circuits.
As is well known, minimizing the surface area of a monolithic integrated circuit chip is very desirable for the purpose of improving yield. To reduce this area requires that the number of component devices used be reduced, often an undesirable method, or that the areas taken up by each of the component devices be reduced or, perhaps, that a closer packing of the component devices on the chip be achieved or some combination of these. In Hall effect magnetic sensors which are constructed using monolithic integrated circuit techniques, the Hall effect element often takes a substantial amount of surface area on the monolithic integrated circuit chip in which it is provided.
Reducing the area of the Hall effect element has heretofore led to a substantial degradation in the parameters characterizing the Hall element. For example, reducing the distance between the power terminals in the Hall element leads to a drop in resistance between these terminals and, hence, to a larger energization current to maintain a given voltage potential between these terminals. However, the width cannot be made two narrow with respect to the length if a satisfactory voltage output between the signal terminals of the Hall element is to be obtained. Thus, reducing the length or width dimensions to reduce the integrated circuit chip surface area to any great extent taken by a conventional rectangular Hall element leads to performance impairments. Further limits concerning the area of an integrated circuit Hall element exist because of the minimum area which must be taken up in providing electrical contacts to the element due to the size of these diffusions and contacts.